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TLC5945
www.ti.com
SLVS755 – MARCH 2007
PRINCIPLES OF OPERATION (continued)
MODE
XLAT
SIN(a )
DCb
MSB
DCa
LSB
GSb1
MSB
GSa1
LSB
GSb2
MSB
GSa2
LSB
GSb3
MSB
SCLK
1
192
1
384
385
1
384
385
1
96X2
192X2
SOUT(b )
-
DCb
MSB
-
-
GSb1
MSB
SIDb1
MSB
SIDb1
MSB-1
SIDa1
LSB
GSb2
MSB
SIDb2 SIDb2
MSB MSB -1
BLANK
GSCLK
1
4096
1
OUT0
(current)
OUT1
(current)
OUT15
(current)
XERR
Figure 8. Timing Chart for Two Cascaded TLC5945 Devices
ERROR INFORMATION OUTPUT
The open-drain output XERR is used to report both of the TLC5945 error flags, TEF and LOD. During normal
operating conditions, the internal transistor connected to the XERR pin is turned off. The voltage on XERR is
pulled up to V CC through an external pullup resistor. If TEF or LOD is detected, the internal transistor is turned
on, and XERR is pulled to GND. Because XERR is an open-drain output, multiple ICs can be ORed together
and pulled up to V CC with a single pullup resistor. This reduces the number of signals needed to report a system
error (see Figure 16 ).
To differentiate LOD and TEF signal from XERR pin, LOD can be masked out with BLANK = HIGH.
Table 2. XERR Truth Table
ERROR CONDITION
ERROR INFORMATION
SIGNALS
TEMPERATURE
T J < T (TEF)
T J > T (TEF)
T J < T (TEF)
T J > T (TEF)
OUTn VOLTAGE
Don't Care
Don't Care
OUTn > V (LED)
OUTn < V (LED)
OUTn > V (LED)
OUTn < V (LED)
TEF
L
H
L
L
H
H
LOD
X
X
L
H
L
H
BLANK
H
L
XERR
H
L
H
L
L
L
12
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